User Contributed                                           MET/CAL PROCEDURE
=============================================================================
INSTRUMENT:            Lambda LRS-55-28:Regulated Power Supply
DATE:                  08-Jun-97
AUTHOR:                User Contributed
REVISION:              0
ADJUSTMENT THRESHOLD:  100%
NUMBER OF TESTS:       9
NUMBER OF LINES:       114
CONFIGURATION:         Datron 1281
STANDARD:              DTB Metered Variac
STANDARD:              Transistor Devices DLP 50
=============================================================================
 STEP    FSC    RANGE NOMINAL        TOLERANCE     MOD1        MOD2  3  4 CON
  1.001  ASK+                                          X
  1.002  ASK-                        P                            F
  1.003  HEAD         ÍÍ INITIAL CONDITIONS ÍÍ
  1.004  DISP         Set DTB Metered Variac to the OFF position.
  1.005  DISP         Connect the DTB Metered Variac to the UUT as follows:
  1.005  DISP         AC output to UUT L1 and N2 terminal connections.
  1.006  DISP         ÿ Connect the UUT and the DLP 50 as follows:
  1.006  DISP         ÿ[27][91]1m     LRS-55-28    TO     DLP 50[27][91]m
  1.006  DISP         ÿ  OUTPUT  +V ------------> INPUT- (+)
  1.006  DISP         ÿ  OUTPUT  -V ------------> INPUT- (-)
  1.007  DISP         ÿ Connect the UUT and the 1281 as follows:
  1.007  DISP         ÿ[27][91]1m     LRS-55-28    TO      1281 [27][91]m
  1.007  DISP         ÿ  INPUT- (+) ÄÄÄÄÄÄÄÄÄÄÄÄ> INPUT-HIGH
  1.007  DISP         ÿ  INPUT- (-) ÄÄÄÄÄÄÄÄÄÄÄÄ> INPUT-LO
  1.008  DISP         Set the variac to 115 VAC.
  1.009  STD          DTB Metered Variac
  1.010  HEAD         {}
  1.011  HEAD         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  1.012  HEAD         {º VOLTAGE ACCURACY TEST º}
  1.013  HEAD         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}
  1.014  HEAD         {}ÍÍ VOLTAGE ACCURACY TEST ÍÍ
  1.015  JMP          2.001
  1.016  EVAL
  2.001  IEEE         [@1281] DCV AUTO
  2.002  IEEE         [@1281] [D3000]RDG?[I]
  2.003  MATH         MEM1 = 28.00
  2.004  MEME
  2.005  MEMC         V              5% 0.00U
  3.001  HEAD         {}
  3.002  HEAD         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  3.003  HEAD         {º LOAD REGULATION TEST @ 10 AMPSº}
  3.004  HEAD         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}
  3.005  HEAD         {}ÍÍ LOAD REGULATION TEST ÍÍ
  3.006  JMP          4.001
  3.007  EVAL
  4.001  DISP         Set the DLP 50 front panel controls as follows:
  4.001  DISP         VOLTS RANGE ........................................ 60V
  4.001  DISP         AMPS RANGE ......................................... 18A
  4.001  DISP         MODE ............................................. 0-30A
  4.001  DISP         DC switch .......................................... OFF
  4.001  DISP         LOAD ADJUST COARSE/FINE ...................... fully ccw
  4.001  DISP         AC ON switch ........................................ ON
  4.002  STD          Transistor Devices DLP 50
  4.003  DISP         Set the DLP 50 front panel controls as follows:
  4.003  DISP         DC switch ........................................... ON
  4.004  DISP         Adjust DLP 50 COARSE and FINE LOAD ADJUST controls
  4.004  DISP         for a DLP 50 reading of 10 Amps.
  4.005  IEEE         [@1281] DCV AUTO
  4.006  IEEE         [@1281] [D3000]RDG?[I]
  4.007  MEME
  4.008  DISP         Set the DLP 50 front panel controls as follows:
  4.008  DISP         DC switch .......................................... OFF
  4.009  IEEE         [@1281] DCV AUTO
  4.010  IEEE         [@1281] [D3000]RDG?[I]
  4.011  MATH         MEM = (MEM - MEM1)
  4.012  MATH         MEM1 = 0.00
  4.013  MEME
  4.014  MEMC         mV             28.00U        FULLÿtoÿNO
  5.001  HEAD         {}
  5.002  HEAD         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  5.003  HEAD         {º LINE REGULATION TEST @ 10 AMPSº}
  5.004  HEAD         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}
  5.005  HEAD         {}ÍÍ LINE REGULATION TEST ÍÍ
  5.006  JMP          6.001
  5.007  EVAL
  6.001  DISP         Set the DLP 50 front panel controls as follows:
  6.001  DISP         DC switch ........................................... ON
  6.002  DISP         Set the variac to 105 VAC.
  6.003  IEEE         [@1281] DCV AUTO
  6.004  IEEE         [@1281] [D3000]RDG?[I]
  6.005  MEME
  6.006  DISP         Set the variac to 125 VAC.
  6.007  IEEE         [@1281] DCV AUTO
  6.008  IEEE         [@1281] [D3000]RDG?[I]
  6.009  MATH         MEM = (MEM - MEM1) * 1000
  6.010  MATH         MEM1 = 0.00
  6.011  MEME
  6.012  MEMC         mV             28.00U        105ÿtoÿ125VAC
  7.001  DISP         Set the variac to 115 VAC.
  7.002  HEAD         {}
  7.003  HEAD         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  7.004  HEAD         {º RIPPLE AND NOISE TEST º}
  7.005  HEAD         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}
  7.006  HEAD         {}ÍÍ RIPPLE AND NOISE TEST ÍÍ
  7.007  JMP          8.001
  7.008  EVAL
  8.001  IEEE         [@1281]ACV AUTO
  8.002  IEEE         [@1281][D5000]RDG?[I]
  8.003  MATH         MEM=(MEM*2.82)*1000
  8.004  MATH         MEM1 = 0.00
  8.005  MEME
  8.006  MEMC         mVP-P          +10.00U
  9.001  DISP         Set the DLP 50 front panel controls as follows:
  9.001  DISP         DC switch .......................................... OFF
  9.002  DISP         Set DTB Metered Variac to the OFF position.
  9.003  HEAD         {}
  9.004  DISP         {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»}
  9.004  DISP         {º THIS COMPLETES THE VERIFICATION º}
  9.004  DISP         {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ}
  9.005  END